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Cost-effective and programmable photonic-driven solutions like electronic counterparts (FPGAs) can be implemented using waveguide mesh architectures along with tunable couplers for routing to implement general-purpose photonic processors. These processors/ networks are represented using undirected weighted graphs, where weights are included to implement constraints in the routing. Faster automated routing and cycle finding algorithms are crucial for dynamic path allocations in live networks to implement various functionalities using these processors. We propose path and cycle finding algorithms based on bidirectional and depth-first search techniques, considering various performance metrics for each device to optimize the path according to the required metric. Multiple cases of path distribution and implementation of cycles of various sizes have been demonstrated. Various methods to eliminate the non-functioning or malfunctioning units are proposed. The broad applicability of the proposed path-finding algorithm has been demonstrated using the same algorithm to create a list of all the possible input-output combinations in a 4*4 photonic switching network. A comparison of available search algorithms in terms of execution time and complexity has been described.