论文标题

有效的算法加速器共同设计,用于边缘设备上的AI解决方案

Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices

论文作者

Hao, Cong, Chen, Yao, Zhang, Xiaofan, Li, Yuhong, Xiong, Jinjun, Hwu, Wen-mei, Chen, Deming

论文摘要

高质量的AI解决方案需要对AI算法的联合优化,例如深神经网络(DNNS)及其硬件加速器。为了提高整体解决方案质量以及提高设计生产率,有效的算法和加速器共同设计方法是必不可少的。在本文中,我们首先讨论算法/加速器共同设计问题的动机和挑战,然后提供多种有效的解决方案。特别是,我们重点介绍了有效共设计方法的三项领先作品:1)第一个同时DNN/FPGA共同设计方法; 2)双向轻型DNN和加速器共同设计方法; 3)一种可区分,有效的DNN和加速器共搜索方法。我们使用FPGA和GPU的广泛实验证明了所提出的共同设计方法的有效性,并与现有作品进行了比较。本文强调了算法加速器共同设计的重要性和功效,并呼吁在这个有趣且苛刻的领域进行更多的研究突破。

High quality AI solutions require joint optimization of AI algorithms, such as deep neural networks (DNNs), and their hardware accelerators. To improve the overall solution quality as well as to boost the design productivity, efficient algorithm and accelerator co-design methodologies are indispensable. In this paper, we first discuss the motivations and challenges for the Algorithm/Accelerator co-design problem and then provide several effective solutions. Especially, we highlight three leading works of effective co-design methodologies: 1) the first simultaneous DNN/FPGA co-design method; 2) a bi-directional lightweight DNN and accelerator co-design method; 3) a differentiable and efficient DNN and accelerator co-search method. We demonstrate the effectiveness of the proposed co-design approaches using extensive experiments on both FPGAs and GPUs, with comparisons to existing works. This paper emphasizes the importance and efficacy of algorithm-accelerator co-design and calls for more research breakthroughs in this interesting and demanding area.

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